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The IEEC values research as a means to create connections and to open future possibilities in the area of electronics packaging.

  

Pooled Research Projects

Every year, we provide what we call "seed-funding," to propel research opportunities in the direction of capacity building and problem-solving for faculty members in academia.

Skilled researchers partner with industry members to meet real-time project needs of companies. That is, whether you are a chemist, physicist, or mechanical engineer, to name a few, members of all fields carry expertise that is integral in catapulting the metrics of success for projects to reach new heights.

Below are the abstracts of the selected 2018-2019 Pooled Research Projects-a partnership between faculty and mentor companies.

2019-2020 Pooled Research Projects

• Power-electronic Modular Power Conversion System for Batteries integration to AC system - Pritam Das

  The global energy storage market is growing exponentially to an annual installation size of 6 gigawatts (GW) in 2017 and over 40 GW by 2022 from an initial base of only 0.34 GW installed in 2012 and 2013. Energy storage system (ESS) enables availability of electricity that has been produced at times of either low demand or at low generation cost or from intermittent energy sources. The stored energy can be used at times of high electricity demand or load leveling or for any other consumers or electric loads like electric vehicles (EVs). Due to high reliability and modularity of proposed system it can be deployed as modular Transformer Rectifier Units (TRUs) for More Electric Aircraft (MEAs) and electrified marine systems. Further such modular system can be highly portable and highly power dense and light weight all essential for setting up mission critical power systems with battery back-up for military applications.

• Computing Thermal Conductivity in Materials form First Principles - Manuel Smeu
  Heat management is a critical issue in today’s electronics due to increased device density. Materials with superior thermal conductivity are needed to facilitate the removal of heat from components. We propose to employ first principles modeling based on density functional theory to calculate the thermal conductivity for various novel materials. This work will serve to gain a better understanding of what attributes in a material make it conduct heat well, which can be leveraged to design superior materials for this purpose. We will calculate the phonon band structures and the intrinsic lattice thermal conductivity using the VASP and Phono3py packages. The proposed calculations will provide a better understanding of thermal transport in various types of materials, e.g. 2D, 3D. Specifically, several zinc-blende structures will be considered including the bismuth-based XBi (X = B, Al, Ga, In) and beryllium-based BeY (Y = S, Se, Te) systems. Additionally, we will obtain the characteristics of single-layer, multi-layer and bulk PtY2 dichalcogenides. Finally, we will investigate single-layer WSe2, a material which undergoes a temperature-dependent crystalline phase transition. This research will guide future experiments and inform industries of potentially superior thermal materials.
• The Mechanical and Electromigration Behavior of Pb Free Solder Joints containing Bi: High Melt-Low Melt Solder Interconnect Structures for SMT Applications - Eric Cotts
  We will study the materials science of SAC/Bi-Sn solder joints (e.g., SAC305/Bi42Sn, Fig. 1a) and on such mixed assemblies when both board and component are bumped (Fig. 1b), which promise to provide lower temperature assembly for a wide range of conditions. The eutectic Bi42Sn solder alloy enables process temperatures as low as 150oC (Fig. 2) and is widely available in paste form (the Bi42Sn1Ag is a popular variant intended to improve interfacial toughness in drop shock loading). We propose to examine the properties of mixed solder alloy joints with combinations of SAC305 or SAC405 solder balls, and Bi42Sn or Bi42Sn1Ag solder paste (Fig.1). Key parameters will include the thickness (volume) of the near eutectic BiSn paste, the peak reflow temperature and reflow time, and fabrication parameters (in particular, variation of geometry from that of Fig. 1a to that of Fig. 1b). We will examine microstructures of final joints, determining grain sizes and orientations, as well as composition throughout the joints (including Bi concentration). Mechanical characterization will include hardness and shear characteristics of individual and mixed assembly solder joints. Furthermore, characterizations of the current density limits of such SnBi mixed assemblies will be conducted over a range of current densities, temperatures, and geometries, with focus on the newer geometry illustrated in Fig. 1b. Fabrication of such samples will be by conventional means. Building an understanding of the materials science of these new solder joints will provide for reliable product design capability.
• Through-Hole Filling for Fabricating Microelectrode Array Chip and 3D Printing for Constructing Plugand-Play Sensor Platform - Chuan-Jian Zhong & Mark Poliks
  Thin substrates such as papers, plastics and glasses are widely used for making microelectronic devices which have captured global interests in the wearable markets. For sensor devices, a major challenge is the ability to fabricate a low-cost, multifunctional and miniaturized chip which integrates electrically conductive patterns, sensing materials, and the electronics into a compact device compatible for the target application. Existing approaches do not address this challenge due to the lack of high-performance conductive inks/pastes. Built upon our recent success in developing low temperature sinterable metal/alloy nanoparticle and nanowire inks/pastes, we hypothesize that the combination of through-hole filling of thin substrates for creating microelectrode array chip and 3D printing for constructing the device manifold could lead to low-cost and high-performance sensor chips. The demonstration of this hypothesis will be significant for providing an effective solution to the challenging problem in electronics manufacturing involving through-hole high density interconnects. While our long-term goal is to develop wearable breath and sweat sensor chips for point-of-case healthcare application, the specific objectives of this project include: 1) understanding the control parameters for through-hole filling with our nanoparticle and nanowire pastes to create microelectrode arrays as a plug-and-play sensor chip in 3D printed microfluidic platform, and 2) testing the sensor performance with a focus on sensitive and selective detection of ionic species.
• Electronics Cooling Using Electrospray - Paul Chiarot & Peter Huang
  We propose to develop a cool mist-based microfluidic thermal management strategy where sub-micron scale liquid droplets suspended in air are injected into cooling channels (gaps) between heat generating electronic devices. The droplets will be created using electrospray atomization. This technology takes advantage of the low power requirement of electrospray and the rapid heat removal capacity of liquid evaporation. In Year 1 of this project, we will conduct an experimental investigation to demonstrate the superior cooling effectiveness of this technology over conventional continuous flow-based cooling. We will also create a computational model that will be used to optimize several key control parameters.
• Experimental and Numerical Investigation of Adhesion Enhancement of Copper/Glass and Polyimide/Glass Interfaces - Congrui Jin
  Glass has been widely recognized as a potential alternative to silicon as an interposer substrate material in microelectronic packaging. One aspect that remains a challenge for the adoption of glass substrates for interposer applications is the inherently weak adhesion of the copper/glass and polyimide/glass interfaces. The proposed project aims to develop an in-depth understanding of the interfacial adhesion behavior in the glass/copper and glass/polyimide systems through a combined experimental and numerical approach, which will be of great significance for avoiding structural failure and improving structural reliability. Surface roughening of the glass substrate by sand blasting and laser micro-machining will be applied to improve interfacial adhesion through increased contact area and mechanical interlocking mechanisms. Deposition of silane coupling agents using vapor deposition will be used to create durable bonds between polyimides and glass. Suitable optimization of various process parameters will be conducted to effectively enhance and control interfacial adhesion. Finite element analysis and molecular dynamics simulation will be performed to explain adhesion measurement results and elucidate the underlying mechanisms.
• High-Density and HighPerformance Paper-based Printed Circuit Boards (PCBs) - Seokheun (Sean) Choi
  Papertronics (paper-based electronics) have recently emerged as a next-generation “green” electronic platform with the goal of tackling deformability, cost-effectiveness, electronic waste management, environmental pollutions, and resource shortages. Along with this trend, we successfully established an innovative strategy to revolutionize paper-based PCBs for the future green electronics under the 2018-2019 IEEC Pooled Research Project. With the development of new materials and technologies, there will be more appropriate approaches for paper-based PCBs to meet needs in high density and high performance integrated circuit applications.
• Understanding and Preventing Microjoint Defects Through Design and Process Control - Nikolay Dimitrov
  Any of the common solder pad finishes will occasionally exhibit problems, sometimes even catastrophic failure of a solder joint under loading. We have shown this problem to be preventable in conventional, macro solder joints with electroplated copper pads. What it required is to minimize the incorporation of specific organic impurities into the Cu during electroplating, something that can be done by monitoring of the plating protocol together with replenishment of the chemicals [1]. Motivated by recent developments in 2.5 and 3D packaging, the proposed research goes way farther, focusing on the identification of the root causes behind the formation of defects associated with the intermetallic bonds in much smaller solder volumes (microjoints) at higher operating temperatures. Some of the key reliability concerns in miniaturized devices operating at higher temperatures are associated with electromigration or thermomigration in very small joints on either Ni or Cu pads or Cu pillars. Most joints may seem robust in this respect but there is no practical way to prevent at least a few percent of joints from ending up with a Sn grain orientation that has a vastly inferior resistance to this [2]. Also, issues along these lines could be due to plating process related problems associated with specific kinds of impurities, or by a particular microstructure of the electroplated pads. One alternative would be to react completely a thin solder or Sn cap for forming an intermetallic joint. This may also be important for die stacking in order for lower level joints to support the loads in subsequent thermocompression bonding of die further up [3]. In either case preliminary results suggest that problems may be understood, alleviated and/or prevented by proper control of the electroplating approaches implemented in the fabrication of the Ni or Cu pad finishes.
• Laser 3D Printing Cooling Devices onto Semiconductors - Scott Schiffres & Changhong Ke
  Research Problem: Thermal interface materials are a bottleneck to heat flow, and limit performance as performance increases.
  Research Objective: The goal is to develop an alternative solution for thermal interface materials by metal additive manufacturing which provides lower thermal resistance and enables packages with heat fluxes up to ~1,000 W/cm2.
  Technical Approach: We will develop the process parameters to additively fabricate Cu and/or AlSi10Mg structures on a die (CPU, GPU etc.) using Sn3Ag4Ti interlayer alloy by selective laser melting. The structures can be micro-channels, heat pipes or vapor chamber evaporators. Furthermore, we will look at the interface microstructure and composition of Si-interlayer alloy and Cu and/or AlSi10Mg-interlayer alloy by scanning electron microscopy (SE2, EDS, BEI) and transmission electron microscopy (SAED, BF, DF, EDS). Vibratory polishing, focused ion beam (FIB) and Argon beam ion milling will be used along conventional polishing techniques for sample preparation. We will evaluate the strength of the interfacial bonding by mechanical testing such as ball shear tests and finite element analysis simulations. Thermal properties of the fabricated heat sink structures will be experimentally measured using Frequency-Domain Thermoreflectance (FDTR) analysis across the interface. Finally, the performance of the additively fabricated heat sink will be evaluated experimentally and numerically in single phase and two-phase scenarios.
  Anticipated Outcome: We will develop a process to additively fabricate thermal management devices onto the chip without using conventional thermal management solutions which lead to lower thermal resistance in the package.
  Industry Impact: Current thermal interface materials will not be able to keep up with Moore’s Law, whereas our alternative solution will enable 10X increase in heat fluxes (~1,000 W/cm2). By our calculations, chips can run 10-20 °C cooler under heat fluxes of 100 W/cm2 in current microprocessors.
• A Polymer Composite Interlayer for Reliable Thermal Cycling of Printed Electronics - Jeffrey Mativetsky
  An ongoing challenge when printing electronic materials is the need for reliable performance during thermal cycling. Interconnect failure during thermal cycling often results from a mismatch of the coefficient of thermal expansion between the printed conductor and the substrate. We will address the need for thermal stability by developing a polymer composite interlayer that mitigates electrode stress during thermal cycling.

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